Design and Analysis of Semi-Empirical Model Parameters for Short-Channel CMOS Devices
Magnanil Goswami1, Sudakshina Kundu2
1Magnanil Goswami, Department of CSE & IT, West Bengal University of Technology, Kolkata, India.
2Prof. Sudakshina Kundu, Department of CSE & IT, West Bengal University of Technology, Kolkata, India
Manuscript received on June 25, 2014. | Revised Manuscript received on July 03, 2014. | Manuscript published on July 05, 2014. | PP: 86-89 | Volume-4, Issue-3, July 2014. | Retrieval Number: C2317074314 /2012©BEIESP
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© The Authors. Published By: Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Recently analog circuit designers are interested in structured optimization techniques to automate the process of CMOS circuit design. Geometric programming, which makes use of monomial and posynomial expressions to model MOSFET parameters, represents one such approach. The extent of accuracy in finding a global optimal solution using this approach depends on the formulation of circuit and device equations as monomials and posynomials. Being pivotal in determining device transfer characteristic, transconductance and output conductance cast a direct impact on the overall CMOS circuit behavior. In this paper we developed and substantiated high fidelity expressions of transconductance and output conductance for short-channel MOSFETs in monomial form
Keywords: Analog CMOS circuit, geometric programming, global optimal solution, short-channel MOSFET, structured optimization.